App note: TQFN package thermal pad via design guide

TQFN footprint pad via design guide for proper thermals from Diodes Incorporated. Link here (PDF)

TQFN packages have exposed pads to provide excellent electrical grounding paths to the PCB and transfer the device heat through thermal vias on the PCB thermal landing to the internal copper planes. In order to maximize the removal of heat from the package, the number of vias, the size of the vias, and the construction of the vias must be considered for the thermal landing pattern. The exposed pad must be soldered down to ensure adequate heat conduction from the package.

from Dangerous Prototypes https://ift.tt/2IJkU6D

App note: Understanding thermal resistance in the real world

App note from Diodes Incorporated about thermal resistance and how to manage them in real world scenario. Link here (PDF)

There can be significant differences between the thermal characteristics stated on a device datasheet and what actually happens in a realworld application. Semiconductor manufacturers usually provide thermal resistance values for Junction to Case (RθJC) and Junction to Ambient (RθJA); although these are extremely useful parameters to estimate a device power handling capability, there can still be a disconnection between those figures and reality.

from Dangerous Prototypes https://ift.tt/31fdr5t